1. Field of the Invention
The present invention relates to a tri-state output circuit using bipolar transistors and complementary field effect transistors, and is operable with low power consumption, high load driving capability and at high speed.
2. Description of the Prior Art
Various types of tri-state output circuits are known heretofore which can take three output conditions, i.e., high and low level conditions and a high impedance condition at the output terminal of the circuit. These tri-state output circuits include a TTL circuit construction using bipolar transistors and a CMOS circuit construction using CMOS transistors, which are one kind of complementary FET (field effect transistor).
When the tri-state output circuit is constructed with a TTL circuit construction, a circuit having a high load driving capability and operable at high speed can be realized due its large transfer conductance, which is one feature of bipolar transistors.
In the TTL circuit construction, however, an electric current flows through the circuit even when it is in a steady state, which results in an increase in power consumption. If an attempt is made to reduce the current flow through the circuit in this case, in order to reduce the power consumption, its high speed operability will be lowered.
On the other hand, when the tri-state output circuit is constructed with a CMOS circuit construction, the power consumption can be reduced. However, since the transfer conductance of MOS transistors is small, compared with that of bipolar transistors, the load driving capability is decreased, which in turn results in a detrimental effect in the high speed operation of the circuit.
When an attempt is also made to increase the driving capability of the circuit as well as to realize a high speed operation in this case by increasing the size of the transistors, the circuit has to be large. This will bring about an adverse effect in view of the miniturization of integrated circuits.
In addition, if the size of the transistors in the output stage is increased, the ON-time resistance of the transistors is decreased. As a result, when the output signal is either overshot or undershot, the ON-time resistance of the transistors can no longer absorb the overshoot or the undershoot of the output signal in a resonance circuit, which contains an inductance component of the wiring leads connected to the output terminal and a capacitance component of a load, thereby producing the "ringing". This will bring about, in the worst case, a malfunction.
Accordingly, in both cases of the TTL circuit construction and of the CMOS circuit construction, according to the prior art, it was difficult to realize a tri-state output circuit with a low power consumption, a high load driving capacity, and a high speed operation as well as the ability to suppress the ringing phenomena.